Generally, a capacitor for a semiconductor device should have a capacitance higher than a predetermined level, and for the purpose of increasing the refresh time of a semiconductor device, especially, a DRAM or the like, continuous research and development have been carried out so as to have a lower leakage current characteristic.
Meanwhile, with the high integration of a semiconductor device, the surface area occupied by each region of the semiconductor device decreases gradually. As such, the surface area for forming a capacitor in the semiconductor device also decreases, which makes it uneasy to obtain sufficient capacitance and low leakage current characteristics.
Hereinafter, the problems of a capacitor for a semiconductor device and a manufacturing method thereof in the prior art will be described in more detail with reference to the accompanying drawings.
FIGS. 1a to 1g are cross sectional views of a conventional manufacturing process of a capacitor. Referring to these drawings, the prior art problems of a capacitor for a semiconductor device and a manufacturing method thereof will be described below.
Firstly, as shown in FIG. 1a, a structure of bit line electrodes 2 and the like is formed over a predetermined lower structure 1 formed on a semiconductor substrate (not shown) in which active regions are defined by a device isolation film (not shown).
Continually, as shown in FIG. 1b, an interlayer insulating film 3 made of an oxide film or the like is deposited on the entire surface of the top part of the above structure, and a nitride film 4 is deposited as a barrier layer on the interlayer insulating film 3.
Then, as shown in FIG. 1c, the nitride film 4 and the interlayer insulating film 3 are etched by a photoetching process to thus form a contact hole. The contact hole exposes the surface of the lower structure 1, especially the surface of a plug (not shown) connected to a junction of the semiconductor substrate (not shown) corresponding to a storage node located between the bitline electrodes 2.
Continually, as shown in FIG. 1d, a conductive polycrystalline silicon is deposited over the entire surface of the resultant material, so that the contact hole may be buried by the polycrystalline silicon. Then, a planarization process is performed on the resultant material until the nitride film 4 is exposed, to thus form a contact plug 5 within the contact hole.
Next, as shown in FIG. 1e, an oxide film 6 is deposited on the entire surface of the top part of the structure, and thereafter a predetermined region of the oxide film 6 is etched through a photoetching process, to thus expose the top part of the contact plug 5 and a predetermined region of the nitride film 4 in the peripheral part thereof. The region where the oxide film 6 is to be etched is directly related with the surface area of a lower electrode of a capacitor to be formed later, and is set as wide as possible, considering the clearance distance from the capacitor of an adjacent cell.
Continually, a polysilicon film is deposited over the entire surface of the resultant material, and thereafter the portion deposited on the oxide film 6 is removed from the deposited polysilicon film by chemical mechanical planarization (CMP) or the like. Then, the remaining oxide 6 portion is selectively etched and removed, to thus form a capacitor lower electrode 7 as shown in FIG. 1f. 
Next, as shown in FIG. 1g, a dielectric film 8 is deposited on the top part of the structure. As the dielectric film, a multilayered oxide film-nitride film-oxide film is formed (i.e., an ONO film). Then, a capacitor upper electrode 9 is formed on the resultant material, thereby completing the manufacturing of the capacitor.
However, the capacitor structure including the dielectric film 8 using a prior art single ONO film cannot satisfy both the sufficient capacitance and low leakage current characteristic.
Accordingly, a dielectric film formed of AlON (aluminum oxynitride) has been used so as to improve the leakage current characteristic. In this case, however, although the interface characteristics are excellent and thus the leakage current characteristics are good, recent needs for capacitors demanding a high capacitance cannot be met due to a low capacitance characteristic.
In this way, as the integration degree of semiconductor devices is increased, capacitors utilizing a single dielectric film cannot satisfy both the capacitance and leakage current characteristics that the capacitors should have.